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STD25NE03L
N - CHANNEL 30V - 0.019 - 25A - TO-251/TO-252 STripFETTM POWER MOSFET
TYPE STD25NE03L
s s s s
V DSS 30 V
R DS(o n) < 0.025
ID 25 A
TYPICAL RDS(on) = 0.019 100% AVALANCHE TESTED LOW GATE CHARGE APPLICATION ORIENTED CHARACTERIZATION
3 2 1
1 3
DESCRIPTION This Power MOSFET is the latest development of STMicroelectronics unique "Single Feature SizeTM" strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s SOLENOID AND RELAY DRIVERS s MOTOR CONTROL, AUDIO AMPLIFIERS s DC-DC & DC-AC CONVERTERS IN HIGH PERFORMANCE VRMs s AUTOMOTIVE ENVIRONMENT(INJECTION, ABS, AIR-BG, LAMPDRIVERS, Etc.)
IPAK TO-251 (Suffix "-1")
DPAK TO-252
(Suffix "T4")
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symb ol V DS V DGR VGS ID ID I DM (*) P tot T st g Tj Parameter Drain-source Voltage (VGS = 0) Drain- gate Voltage (R GS = 20 k) Gate-source Voltage Drain Current (continuous) at Tc = 25 C Drain Current (continuous) at Tc = 100 C Drain Current (pulsed) Total Dissipation at T c = 25 C Derating F actor Storage T emperature Max. Operating Junction Temperature
o o o
Value 30 30 20 20** 18** 100 45 0.3 -65 to 175 175
(**) Value limited only by the package
Unit V V V A A A W W /o C
o o
C C
(*) Pulse width limited by safe operating area
March 1999
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STD25NE03L
THERMAL DATA
R thj -case R thj -amb R thc-sink Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Thermal Resistance Case-sink Maximum Lead Temperature F or Soldering Purpose Max Max T yp 3.33 100 1.5 275
o o
C/W C/W o C/W o C
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF
Symbo l V (BR)DSS I DSS IGSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 A V GS = 0 Min. 30 1 10 100 Typ. Max. Unit V A A nA
V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating Gate-body Leakage Current (VDS = 0) V GS = 20 V
T c = 125 oC
ON ()
Symbo l V GS(th) R DS(on) I D(o n) Parameter Gate Threshold Voltage V DS = V GS Static Drain-source On Resistance On State Drain Current V GS = 10V V GS = 5V Test Con ditions ID = 250 A ID = 12.5 A ID = 12.5 A 20 Min. 1 Typ. 1.6 0.019 Max. 2.5 0.025 0.030 Unit V A
V DS > ID(o n) x R DS(on )ma x V GS = 10 V
DYNAMIC
Symbo l g f s () C iss C os s C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Con ditions V DS > ID(o n) x R DS(on )ma x V DS = 25 V f = 1 MHz ID = 12.5 A V GS = 0 Min. 10 Typ. 16 1270 350 115 Max. Unit S pF pF pF
2/9
STD25NE03L
ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symbo l t d(on) tr Qg Q gs Q gd Parameter Turn-on Delay T ime Rise Time Total G ate Charge Gate-Source Charge Gate-Drain Charge Test Con ditions V DD = 15 V I D = 19 A R G = 4.7 V GS = 4.5 V (Resistive Load, see fig. 3) V DD = 24 V ID = 38 A V GS = 5 V Min. Typ. 28 220 21 9 11 29 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbo l t d(of f) tf tr (Voff) tf tc Parameter Turn-off Delay T ime Fall T ime Off-voltage Rise T ime Fall T ime Cross-over Time Test Con ditions V DD = 15 V I D = 19 A V GS = 4.5 V R G = 4.7 (Resistive Load, see fig. 3) V DD = 24 V I D = 38 A V GS = 4.5 V R G = 4.7 (Induct ive Load, see fig. 5) Min. Typ. 45 35 30 85 125 Max. Unit ns ns ns ns ns
SOURCE DRAIN DIODE
Symbo l ISD I SDM (*) V SD () t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 25 A V GS = 0 45 60 2.5 I SD = 38 A di/dt = 100 A/s T j = 150 o C V DD = 15 V (see test circuit, fig. 5) Test Con ditions Min. Typ. Max. 20 100 1.5 Unit A A V ns nC A
() Pulsed: Pulse duration = 300 s, duty cycle 1.5 % (*) Pulse width limited by safe operating area
Safe Operating Area
Thermal Impedance
3/9
STD25NE03L
Output Characteristics Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
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STD25NE03L
Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
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STD25NE03L
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
6/9
STD25NE03L
TO-251 (IPAK) MECHANICAL DATA
DIM. MIN. A A1 A3 B B2 B3 B5 B6 C C2 D E G H L L1 L2 0.45 0.48 6 6.4 4.4 15.9 9 0.8 0.8 0.3 0.95 0.6 0.6 6.2 6.6 4.6 16.3 9.4 1.2 1 0.017 0.019 0.236 0.252 0.173 0.626 0.354 0.031 0.031 2.2 0.9 0.7 0.64 5.2 mm TYP. MAX. 2.4 1.1 1.3 0.9 5.4 0.85 0.012 0.037 0.023 0.023 0.244 0.260 0.181 0.641 0.370 0.047 0.039 MIN. 0.086 0.035 0.027 0.025 0.204 inch TYP. MAX. 0.094 0.043 0.051 0.031 0.212 0.033
H C A C2 L2 D B3 B6 A1 L
= =
3
B5
B
A3
=
B2
=
G
=
E
L1
1
2
=
0068771-E
7/9
STD25NE03L
TO-252 (DPAK) MECHANICAL DATA
mm MIN. A A1 A2 B B2 C C2 D E G H L2 L4 0.6 2.2 0.9 0.03 0.64 5.2 0.45 0.48 6 6.4 4.4 9.35 0.8 1 0.023 TYP. MAX. 2.4 1.1 0.23 0.9 5.4 0.6 0.6 6.2 6.6 4.6 10.1 MIN. 0.086 0.035 0.001 0.025 0.204 0.017 0.019 0.236 0.252 0.173 0.368 0.031 0.039 inch TYP. MAX. 0.094 0.043 0.009 0.035 0.212 0.023 0.023 0.244 0.260 0.181 0.397
DIM.
H
A
C2
C
DETAIL "A"
A1
L2
D DETAIL "A" B
=
=
3
B2
=
=
G
E
2
L4
1
=
=
A2
0068772-B
8/9
STD25NE03L
Information furnished is believed to be accurate and reliable. However, STMicroelect onics assumes no responsibil ity for the consequences r of use of such information nor for any infringement of patents or other rights of third partes which may result from its use. No license is i granted by implication or otherwise under any patent or patent rights of STMicroelectro nics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all informaton previously supplied. STMicroelectronics products i are not authorized for use as critical components in life support devices or systems with express written approval of STMicroelectronics. out The ST logo is a trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysi - Malta - Mexico - Morocco - The Netherlands a Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com .
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